MAKE

This is a build automation tool used to compile and manage projects efficiently. A Makefile defines a set of rules and dependencies that tell make how to build specific targets—such as compiling source code into an executable. This approach helps automate complex build processes and ensures that only changed files are recompiled, saving time during development.

root@dev:~$

 source = sourceName1.c sourceName2.c main.c
 objects = objName1.o objName2.o main.o
 program = programName$(program):$(objects)
   gcc $(objects) -o $(program)
   
 $(objects):$(source)